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Final Electrical Specifications
LTC1520 50Mbps Precision Quad Line Receiver
FEATURES
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DESCRIPTION
May 1996
Precision Propagation Delay: 18ns 3ns Over Temperature Data Rate: 50Mbps Low tPLH/tPHL Skew: 500ps Typ Low Channel-to-Channel Skew: 400ps Typ Rail-to-Rail Input Common Mode Range High Input Resistance: 18k, Even When Unpowered Hot Swap Capable Can Withstand Input DC Levels of 10V Short-Circuit Protected Single 5V Supply LVDS Compatible Will Not Oscillate with Slow Input Signals
The LTC(R)1520 is a high speed, precision differential line receiver that can operate at data rates as high as 50Mbps. A unique architecture provides very stable propagation delays and low skew over a wide input common mode, input overdrive and ambient temperature range. Propagation delay is 18ns 3ns, while typically tPLH/tPHL skew is 500ps and channel-to-channel skew is 400ps. Each receiver translates differential input levels (VID 100mV) into valid CMOS and TTL output levels. Its high input resistance (18k) allows many receivers to be connected to the same driver. The receiver outputs go into a high impedance state when disabled. Protection features include thermal shutdown and a controlled maximum short-circuit current (50mA max) that does not oscillate in and out of short-circuit mode. Input resistance remains 18k when the device is unpowered or disabled, thus allowing the LTC1520 to be hot swapped into a backplane without loading the data lines. The LTC1520 operates from a single 5V supply and draws 12mA of supply current. The part is available in a 16-lead narrow SO package.
APPLICATIONS
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High Speed Backplane Interface Line Collision Detector PECL and LVDS Line Receivers Level Translator Ring Oscillator Tapped Delay Line
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATION
High Speed Backplane Receiver
LTC1520
Propagation Delay Guaranteed to Fall Within Shaded Area (3ns)
+ + - -
RECEIVER INPUT VID = 500mV RECEIVER OUTPUT VDD = 5V
VIN = 1V/DIV VOUT = 5V/DIV
+ -
+ -
5V 3.3k
-5
0
5
3.3k
0.01F
LTC1520 TA01
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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10 15 20 25 30 35 40 45 TIME (ns)
LTC1520 TA02
1
LTC1520 ABSOLUTE
(Note 1)
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RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW B1 1 A1 2 OUT 1 3 ENABLE 4 OUT 2 5 A2 6 B2 7 GND 8 16 VDD 15 B4 14 A4 13 OUT 4 12 NC 11 OUT 3 10 A3 9 B3
Supply Voltage ....................................................... 10V Digital Input Currents ..................... - 100mA to 100mA Digital Input Voltages ............................... - 0.5V to 10V Receiver Input Voltages ........................................ 10V Receiver Output Voltages ............. - 0.5V to VDD + 0.5V Short-Circuit Duration .................................... Indefinite Operating Temperature Range .................... 0C to 70C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
ORDER PART NUMBER LTC1520CS
S PACKAGE 16-LEAD PLASTIC SO
TJMAX = 150C, JA = 90C/ W
Consult factory for Industrial and Military grade parts.
DC ELECTRICAL CHARACTERISTICS
VDD = 5V (Notes 2, 3) per receiver, unless otherwise noted.
SYMBOL VCM VIH VIL IIN1 IIN2 RIN CIN VOC VID(MIN) dVID VOH VOL IOZR IDD IOSR CMRR PARAMETER Input Common Mode Voltage Input High Voltage Input Low Voltage Input Current Input Current (A, B) Input Resistance (Figure 5) A, B Input Capacitance Open-Circuit Input Voltage (Figure 5) Differential Input Threshold Voltage Input Hysteresis Output High Voltage Output Low Voltage Three-State Output Current Total Supply Current All 4 Receivers Short-Circuit Current Common Mode Rejection Ratio VDD = 5V (Note 4) - 0.2V < VCM < VDD + 0.2V VCM = 2.5V IOUT = - 4mA, VID = 0.1V, VDD = 5V IOUT = 4mA, VID = 0.1V, VDD = 5V 0V VOUT 5V VID 0.1V, No Load, Enable = 5V VOUT = 0V, VOUT = 5V VCM = 2.5V, f = 25MHz
q q q q q q q q
CONDITIONS A, B Inputs Enable Input Enable Input Enable Input VA, VB = 5V VA, VB = 0 - 0.2V VCM VDD + 0.2V
q q q q q q q
MIN - 0.2 2
TYP
MAX VDD + 0.2 0.8
UNITS V V V A A A k pF
-1 - 250 18 3 3.2 - 0.1 20 4.6 3.3
1 250
3.4 0.1
0.4 - 10 12 - 50 45 10 20 50
2
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V V mV V V A mA mA dB
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LTC1520
SWITCHI G TI E CHARACTERISTICS
VDD = 5V (Notes 2, 3) VID = 500mV, VCM = 2.5V, unless otherwise noted.
SYMBOL tPLH, tPHL tr, tf tSKD tZL tZH tLZ tHZ tCH-CH tPKG-PKG PARAMETER Input-to-Output Propagation Delay Rise/Fall Times
tPLH - tPHL Skew
Enable to Output Low Enable to Output High Disable from Output Low Disable from Output High Channel-to-Channel Skew Package-to-Package Skew Minimum Input Pulse Width
fIN
Maximum Input Frequency
The q denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. Recommended: VDD = 5V 5%. Note 2: All currents into the device pins are positive; all currents out of the device pins are negative.
TYPICAL PERFORMANCE CHARACTERISTICS
Propagation Delay (tPLH/tPHL) vs Temperature
25 VCM = 2.5V VID = 500mV
PROPAGATION DELAY (ns)
15
PROPAGATION DELAY (ns)
20
10
5
0 -50 -25
50 0 75 25 TEMPERATURE (C)
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CONDITIONS CL = 15pF (Figure 1) CL = 15pF CL = 15pF, Same Receiver (Note 5) CL = 15pF (Figure 2) CL = 15pF (Figure 2) CL = 15pF (Figure 2) CL = 15pF (Figure 2) CL = 15pF (Figure 3) (Note 6) CL = 15pF, Same Temperature (Figure 4, Note 4) (Note 4) (Note 4)
q q q q q q q
MIN 15
TYP 18 2.5 500 10 10 20 20 400 1.5 12 40
MAX 21
UNITS ns ns ps
25 25 35 35
ns ns ns ns ps ns ns MHz
Note 3: All typicals are given for VDD = 5V, TA = 25C. Note 4: Guaranteed by design, but not tested. Note 5: Worst-case tPLH - tPHL skew for a single receiver in a package over the full operating temperature range. Note 6: Maximum difference between any two tPLH or tPHL transitions in a single package over the full operating temperature range.
Propagation Delay (tPLH/tPHL) vs Input Overdrive
25 TA = 25C VCM = 2.5V 20
15
10
5
100
125
0 0.05
0.1
1 INPUT OVERDRIVE (V)
5
10
LTC1520 G01
1520 G02
3
LTC1520 TYPICAL PERFORMANCE CHARACTERISTICS
Propagation Delay (tPLH/tPHL) vs Input Common Mode
25
COMMON MODE REJECTION RATIO (dB)
TA = 25C VID = 500mV
PROPAGATION DELAY (ns)
20
15
10
5
0 0 4 1 3 2 INPUT COMMON MODE (V) 5
PIN FUNCTIONS
B1 (Pin 1): Receiver 1 Inverting Input. A1 (Pin 2): Receiver 1 Noninverting Input. RO1 (Pin 3): Receiver 1 Output. Enable (Pin 4): Receiver Output Enable Pin. A logic high input enables the receiver outputs. A logic low input forces the receiver outputs into a high impedance state. Do not float. RO2 (Pin 5): Receiver 2 Output. A2 (Pin 6): Receiver 2 Noninverting Input. B2 (Pin 7): Receiver 2 Inverting Input. GND (Pin 8): Ground Pin. A ground plane is recommended for all LTC1520 applications. B3 (Pin 9): Receiver 3 Inverting Input. A3 (Pin 10): Receiver 3 Noninverting Input. RO3 (Pin 11): Receiver 3 Output. NC (Pin 12): No Connection. RO4 (Pin 13): Receiver 4 Output. A4 (Pin 14): Receiver 4 Noninverting Input. B4 (Pin 15): Receiver 4 Inverting Input. VDD (Pin 16): 5V Supply Pin. This pin should be decoupled with a 0.1F ceramic capacitor as close as possible to the pin. Recommended: VDD = 5V 5%.
SWITCHI G TI E WAVEFOR S
3V INPUT t PLH OUTPUT VDD/2 2.5V 2.5V t PHL VDD/2
1520 F01
Figure 1. Propagation Delay Test Circuit and Waveforms
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UW
CMRR vs Frequency
46.5 46.0 45.5 45.0 44.5 44.0 43.5 43.0 42.5 42.0 10 1k 100k FREQUENCY (Hz) 10M
LTC1520 G04
TA = 25C
LTC1520 G03
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2V
INPUT
+
1/4 LTC1520 OUTPUT 15pF
1520 F01b
2.5V
-
LTC1520
SWITCHI G TI E WAVEFOR S
3V ENABLE 0V 5V OUT 1 VOL VOH OUT 1 0V t ZH S1 RECEIVER OUTPUT CL 1k S2
1520 F02
1.5V t ZL 1.5V OUTPUT NORMALLY LOW
1.5V t LZ 0.2V
1.5V
OUTPUT NORMALLY HIGH t HZ 1k VDD
Figure 2. Receiver Enable and Disable Timing Test Circuit and Waveforms
EQUIVALE T I PUT NETWORKS
18k A 18k B 3.3V B 3.3V A 18k 18k
RECEIVER ENABLED, VDD = 5V
Figure 5. Input Thevenin Equivalent
APPLICATIONS INFORMATION
Theory of Operation Unlike typical line receivers whose propagation delay can vary by as much as 500% from package to package and show significant temperature drift, the LTC1520 employs a novel architecture that produces a tightly controlled and temperature compensated propagation delay. The differential timing skew is also minimized between rising and falling output edges, and the propagation delays of any two receivers within a package are very tightly matched. The precision timing features of the LTC1520 reduce overall system timing constraints by providing a narrow 6ns window during which valid data appears at the receiver output. This output timing window applies to all receivers in all packages over all operating temperatures
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3V INPUT A1, A2 B1, B2 = 2.5V 2V
CH1 OUT t CH-CH
VDD/2
VDD/2 t CH-CH VDD/2 VDD/2
1520 F03
0.2V
CH2 OUT
Figure 3. Any Channel to Any Channel Skew, Same Package
INPUT A1, B1 VID = 500mV SAME INPUT FOR BOTH PACKAGES PACKAGE 1 OUT 1 t PKG-PKG PACKAGE 2 OUT 1
1520 F04
tPKG-PKG
Figure 4. Package-to-Package Propagation Delay Skew
RECEIVER DISABLED OR VDD = 0V
1520 F05
5
LTC1520
APPLICATIONS INFORMATION
thereby making the LTC1520 well suited for high speed parallel data transmission applications such as backplanes. In clocked data systems, the low skew minimizes duty cycle distortion of the clock signal. The LTC1520 can propagate signals at frequencies up to 25MHz (50Mbps) with less than 5% duty cycle distortion. When a clock signal is used to retime parallel data, the maximum recommended data transmission rate is 25Mbps to avoid timing errors due to clock distortion. Rail-to-rail input common mode range enables the LTC1520 to be used in both single-ended and differential applications with transmission distances up to 100 feet. Thermal shutdown and short-circuit protection prevent latchup damage to the LTC1520 during fault conditions. Single-Ended Applications Over short distances, the LTC1520 can be configured to receive single-ended data by tying one input to a fixed bias voltage and connecting the other input to the driver output. In such applications, standard high speed CMOS logic may be used as a driver for the LTC1520. The receiver trip points may be easily adjusted to accommodate different driver output swings by changing the resistor divider at the fixed input. Figure 6a shows a single-ended receiver configuration with the driver and receiver connected via
MC74ACT04 (TTL INPUT) PC TRACE 5V MC74AC04 (CMOS INPUT) 1/4 LTC1520 2.2k
- +
0.01F
2.2k
1520 F06a
Figure 6a. Single-Ended Receiver
5V 5V
MC74AC04 10 PC TRACE 10pF
1520 F06b
10 OR
0.01F PC TRACE
Figure 6b. Techniques to Minimize Driver Ringing
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PC traces. Note that at very high speeds, transmission line and driver ringing effects have to be considered. Motorola's MECL System Design Handbook serves as an excellent reference for transmission line and termination effects. To mitigate transmission errors and duty cycle distortion due to driver ringing, a small output filter or a dampening resistor on VDD may be needed as shown in Figure 6b. To transmit single-ended data over distances up to 10 feet, twisted pair is recommended with the unused wire grounded at both ends (Figure 7).
MC74ACT04 MC74AC04 10-FT TWISTED PAIR
-
120 5V 3.3k 0.01F 2.2k
1520 F07
1/4 LTC1520
+
Figure 7. Medium Distance Single-Ended Transmission Using a CMOS Driver
Differential Transmission The LTC1520 is well suited for medium distance differential transmission due to its rail-to-rail input common mode range. Clock rates up to 25MHz can be transmitted over 100 feet of high quality twisted pair. Figure 8 shows the LTC1520 receiving differential data from a PECL driver. As in the single-ended configurations, care must be taken to properly terminate the differential data lines to avoid unwanted reflections, etc.
5V 100 100-FT TWISTED PAIR 100
+
RT 1/4 LTC1520 120
* 100 100 *MC10116
-
1520 F08
Figure 8. Differential Transmission Over Long Distances
LTC1520
APPLICATIONS INFORMATION
Alternate Uses The tightly controlled propagation delay of the LTC1520 allows the part to serve as a fixed delay element. Figure 9 shows the LTC1520 used as a tapped delay line with 18ns 3ns steps. Several LTC1520s may be connected in series to form longer delay lines. Each tap in the delay line is accurate to within 17% over temperature. As shown in Figure 10, the LTC1520 can be used to create a temperature stable ring oscillator with period increments
0ns DELAY 18ns DELAY INPUT
+
1/4 LTC1520
-
5V 3.3k
0.01F
3.3k
1520 F09
Figure 9. Tapped Delay Line with 18ns Steps
5V 3.3k
0.01F
3.3k
+
1/4 LTC1520
- +
1/4 LTC1520
+
0.01F 1/4 LTC1520
+
1/4 LTC1520
-
- +
1/4 LTC1520
Figure 10. Temperature Stable Ring Oscillators
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of 36ns. Low skew and good channel-to-channel matching enable this oscillator to achieve better than a 45/55 duty cycle (the duty cycle approaches 50/50 as more LTC1520s are used for lower frequencies). Note that the fixed voltage bias may either be created externally with a resistor divider or generated internally using a bypass capacitor and the internal open circuit bias point (approximately 3.3V). The use of the internal bias point will result in a 1% to 2% distortion of the duty cycle.
36ns DELAY
+
1/4 LTC1520
54ns DELAY
+
1/4 LTC1520
-
+
1/4 LTC1520 72ns DELAY
-
-
+
1/4 LTC1520
-
9.3MHz OSCILLATOR WITH BETTER THAN 45/55 DUTY CYCLE
-
TYPICAL STABILITY 5% OVER TEMPERATURE
+
1/4 LTC1520 6.9MHz OSCILLATOR OUTPUT
-
-
1520 F10
7
LTC1520
PACKAGE DESCRIPTION
S Package 16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.386 - 0.394* (9.804 - 10.008) 16 15 14 13 12 11 10 9
0.010 - 0.020 x 45 (0.254 - 0.508)
0.008 - 0.010 (0.203 - 0.254) 0 - 8 TYP
0.016 - 0.050 0.406 - 1.270
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
RELATED PARTS
PART NUMBER LTC486/487 LTC488/489 LT 1016 LTC1518 LTC1519
(R)
DESCRIPTION Low Power Quad RS485 Driver Low Power Quad RS485 Receiver Ultrafast Precision Comparator High Speed Quad RS485 Receiver High Speed Quad RS485 Receiver
8
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977
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0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
1 0.053 - 0.069 (1.346 - 1.752)
2
3
4
5
6
7
8 0.004 - 0.010 (0.101 - 0.254)
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) TYP
S16 0695
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
COMMENTS 10Mbps, - 7V to 12V Common Mode Range 10Mbps, - 7V to 12V Common Mode Range Single 5V Supply, 10ns Propagation Delay 50Mbps, - 7V to 12V Common Mode Range 50Mbps, - 7V to 12V Common Mode Range
LT/GP 0596 6K * PRINTED IN THE USA
(c) LINEAR TECHNOLOGY CORPORATION 1996

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